This is a demo of my stopwatch for my EE-2902 lab. This stopwatch was written in VHDL for an Altera DE1 FPGA development board. This program demonstrates the separation of a Finite State Machine into separate control and data machines.

For friends and family, VHDL is a hardware description language. It is a way of describing a circuit with text. Although it feels very similar to programming, it is describing a physical circuit. A number or variable in VHDL is turned into a series of wires in the circuit. An operator (add, subtract) is a circuit connected by the wires.  An FPGA is a chip with lots of logic elements (think tiny calculators) and programmable wires to connect them together.

An FPGA is faster than a processor or microcontroller because operations are not done sequentially, but in parallel (at the same time). One teacher shared with me that in medical applications, microcontrollers are difficult to get FDA certified because it is assumed that the memory will corrupt (go bad). Whereas, an FPGA is a physical circuit that should work reliably.

VHDL was created in the 70s and 80s by the US Department of Defense as a way of uniformly describing circuits. Before VHDL each manufacturer had their own way of writing what their chip did. VHDL brought consistency. It was made to document chips that were already created. Now we are using it to design chips. This makes things interesting when in use. If you can imagine, describing how much torque and horsepower an engine has is different than creating an engine.