Jacob Ertel

electrical engineering student

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EE2902

EE-2902 Lab 345 Stopwatch

This is a demo of my stopwatch for my EE-2902 lab.┬áThis stopwatch was written in VHDL for an Altera DE1 FPGA development board. This program demonstrates the separation of a Finite State Machine into separate control and data machines. For… Continue Reading →

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